A thyristor, sometimes also referred to as silicon controlled rectifier (SCR), is a switching device which can be turned on in a forward direction, i.e. when forward biased by a turn-on voltage and when a positive gate current is supplied to a gate terminal. The thyristor is then said to be in a forward conducting state or on state in which a current may flow in a forward direction from an anode to a cathode. On the other hand, the thyristor can also be in a forward blocking state, also referred to as off-state, meaning that a high positive voltage in the forward direction can be blocked. In a reverse direction opposite to the forward direction, the thyristor cannot be turned on. A thyristor may be reverse blocking, which means that it can block at least approximately the same voltage in the reverse direction as in the forward blocking state, or asymmetric, which means that it has virtually no blocking capability in the reverse direction. Since phase control applications commonly require reverse blocking capabilities, a phase control thyristor (PCT) is typically reverse blocking.
In what follows, some basic principles of phase controlled thyristors (PCT) and definitions of terms and wordings subsequently used throughout the description and patent claims will be given with regard to FIGS. 1-4.
FIG. 1 schematically shows a cross-section of a simple thyristor 100. The thyristor comprises a semiconductor slab, in particular a semiconductor waver or die, in which a thyristor structure comprising four layers of differently doped semiconducting material having alternating conduction types, i.e. an npnp-layer-stack structure, has been formed by methods known as such to a person skilled in the art. In an order from a cathode side 102 to an anode side 104 of the thyristor 100, the thyristor structure first comprises an (n+)-doped cathode emitter layer 106. Then, a p-doped base layer 108 and an (n−)-doped base layer 110 follow. Finally, at the anode side 104, a p-doped anode layer 112 is arranged. The (n+)-doped cathode emitter layer 106 is electrically contacted by a cathode metallization 114 formed on a cathode side surface of the semiconductor slab to adjoin said cathode emitter layer 106. The p-doped anode layer 112 is electrically contacted by an anode metallization 116 formed on an anode side surface of the semiconductor slab to adjoin said p-anode layer 112. The p-doped base layer 108 is electrically contacted by a gate metallization 118 formed on the cathode side surface of the semiconductor slab to adjoin said p-doped base layer 108.
A contact region between the cathode side surface and the cathode metallization 114 on the will be referred to as cathode region; a contact region on the cathode side surface between the p-doped base layer 108 and the gate metallization 118 as gate region.
When a positive voltage or forward voltage is applied between the anode metallization 116 (also referred to as anode in what follows for the sake of brevity) and the cathode metallization 114 (also briefly referred to as cathode in what follows), the thyristor 100 may be switched between the forward blocking state, and the forward conducting state. As long as no current is supplied to the gate metallization 118 (for the sake of brevity, also referred to as gate in what follows) the thyristor will remain in the blocking state. However, when the thyristor is triggered by supplying a current to the gate 118, electrons will be injected from the cathode, flow to the anode where they will lead to hole injection, and an electron-hole plasma will form in the p-doped base layer 108 and n-doped base layer 110 which may switch the thyristor 100 into the forward conducting state. The forward conducting state may be maintained as long as the forward voltage is applied and will only be stopped when the forward voltage applied between the anode metallization 116 and the cathode metallization 114 is switched off, or when the voltage applied between and cathode is reversed. Upon applying a reverse, negative voltage between the anode and the cathode, the thyristor goes into a reverse blocking state and may only be switched to the forward conducting state by re-triggering by again applying a forward voltage and a sufficient gate current. However, in order to obtain its full blocking capability, the reverse voltage has to be applied for a certain duration called quiescence time tq such that the electron-hole plasma previously injected may disappear due to recombination processes, thereby reenabling the forward blocking capacity of the device.
To trigger a thyristor 100 as shown in FIG. 1, a substantial gate current would be required. A known, simple remedy is the integration of an auxiliary thyristor 120, as well-known to persons skilled in the art, between a main gate (sometimes also referred to as amplifying gate) and an anode of a thyristor 100′ as depicted in FIG. 2, said thyristor 100′ further comprising a main thyristor 126. The auxiliary thyristor may alternatively be called a pilot thyristor. Therein, a pilot gate 130 (sometimes also referred to as auxiliary gate) contacts the p-doped base 108 in a region of the auxiliary thyristor 120. The auxiliary thyristor 120 also comprises an additional (n+)-doped emitter layer 122, also referred to as auxiliary (n+)-doped emitter layer. The auxiliary (n+)-doped emitter layer 122 is contacted by an additional cathode metallization 124 of the auxiliary thyristor. The additional cathode metallization 124 of the auxiliary thyristor 120 is internally connected to the gate metallization 118, also referred to as main gate metallization, which contacts the underlying p-doped base layer 108 in a region of the main thyristor 126, and wherein the contact region on the cathode side surface between the p-doped base layer 108′ in the region of the main thyristor 126 and the main gate metallization is again referred to as gate region. Preferably, a single, contiguous metallization serves as both additional cathode metallization 124 and main gate metallization 118. An (n+)-doped emitter layer 106 is comprised in the main thyristor region 126 and is contacted by the cathode metallization 114 of the main thyristor, with a contact region between the cathode side surface and the cathode metallization 114 in the region of the main thyristor 126 again referred to as cathode region. Typically, the further cathode metallization 124 of the auxiliary thyristor 120 is not accessible from an outside of the thyristor 100′; i.e. no terminal exists which would allow for direct electric connection from the outside to the further cathode metallization 124.
Exemplarily, the pilot thyristor structure is integrated between pilot gate 130 and main thyristor 126. At the pilot gate the pilot thyristor has a further (n+)-doped emitter layer 122 and towards the main thyristor 126 a (p+)-doped emitter layer. These layers are connected to each other via a metallization. The (p+)-doped emitter layer acts as a short on the border for the additional (n+)-doped emitter layer 122. The current in the additional (n+)-doped emitter layer 122 is converted via the metallization to a hole current, which again acts as an injection current for the main thyristor 126. The (p+)-doped emitter layer carries the hole current, which injects the opposite section of the main thyristor 126. A circumferential (p+)-doped emitter layer is sufficient for this purpose. The charge spreading is achieved via the metallization.
Whereas a high gate overdrive factor, i.e. a ratio of utilized gate current and minimum gate trigger current, may speed up triggering of the thyristor 100′, a further improvement may substantially help this process. As may be seen from FIG. 2, the triggered state of the main thyristor 126, i.e. the injected electron-hole plasma, starts at a boundary of the auxiliary thyristor 120 which conventionally might be a ring of about 1 cm diameter at a center of the thyristor 100′. The plasma then has to spread out to the whole thyristor area which may take several milliseconds. Only after this the thyristor will exhibit its steady on state forward voltage characteristic. To shorten the maximum distance to the area elements of the thyristor device, a distributed amplifying gate structure may be used. This implies that a gate region of the main thyristor may have a more complex shape, and may, for example, comprise a T-gate design, as shown in FIG. 5 of WO 2011/161097 A2, which is hereby included by reference in its entirety, and commonly used for large area PCTs. Such T-gate design may substantially shorten the distance for plasma spread so that the thyristor may be fully turned on by about 1 ms after the gate triggering pulse. Since plasma spread may be related to the time during which there is already substantially forward current and still high blocking voltage, this turn-on duration may have a strong influence on the turn-on energy loss.
For high power applications, thyristors have been developed based on round semiconductor wafers having a diameter dwafer of e.g. 4 or 5 inches. However, advanced thyristor applications require even larger thyristor designs based e.g. on 6 inch wafers. It has been observed that for such large thyristor designs, it may not be sufficient to simply scale-up previous smaller thyristor designs. With increasing thyristor diameter, further effects may gain influence on thyristor operation. For example, a larger thyristor for higher nominal current with equivalent forward blocking capacity or turn-on characteristics as well as cooling characteristics during thyristor operation may not simply be achieved by proportionally scaling thyristor dimensions.
In particular, thyristors having dimensions similar to the ones described above generally require gate regions of even more complicated shape and/or geometry than described further above. Frequently, the gate region comprises a plurality of longitudinal main gate beams extending from a center region of the cathode side surface 102 of the thyristor towards a circumferential region of said surface. Neighboring main gate beams are arranged with a distance with respect to an associated, imaginary intermediate middle line. Exemplary thyristor designs with such gate structures are again described in WO 2011/161097 A2.
In general, the cathode region for thyristors as described above completely surrounds the gate region, and thus has an at least essentially annular or ring-shaped topology. A boundary of the cathode region thus comprises an inner boundary and an outer boundary, with the outer boundary enclosing the inner boundary, and the inner boundary enclosing the gate region. In more mathematical terms, the outer boundary of the cathode region may be thought of as the shortest simple closed curve enclosing the cathode region, wherein a simple closed curve is a closed curve not crossing itself. The inner boundary of the cathode region, on the other hand, may be thought of as the longest simple closed curve enclosed by the outer boundary, but not enclosing any part of the cathode region. Alternatively, the cathode region may be regarded as a contiguous region with a, in particular exactly one, hole, said hole containing the gate region; wherein the inner boundary of the cathode region may be represented by the shortest simple closed curve enclosed by the outer boundary and enclosing the hole.
In a similar manner, an outer boundary of the gate region may be defined. While the outer boundary of the cathode region is frequently at least essentially of circular shape, or may be represented by a polygon having at least 20, preferably at least 100 edges and preferably approximating a circle, the inner boundary of the cathode region generally has a complicated shape resembling the outer boundary of the gate region. In particular, the inner boundary of the cathode region and the outer boundary of the gate region may be similar to one another in a geometric sense.
A thyristor 100′ as described above with a homogeneously doped (n+)-doped cathode emitter layer 106 as shown in FIG. 2 may be very sensitive to transients with positive voltage variations dV/dt, which may give rise to so called dynamic voltage triggering, which is caused by a charging current occurring during build-up of a depletion layer in (n−)-base layer 110, which thus forms a drift region. Said charging current is amplified in a partial transistor formed by the emitter-, base- and drift-layers of the thyristor. Without impeding the forward characteristic significantly, this disadvantage may be mitigated by distributing a plurality of N discrete emitter shorts 128, generally with N>500, often N>1000 or N>2000, across at least a part of the cathode region. The main purpose of the emitter shorts 128 is to allow for removal of a leakage current which occurs during the forward blocking state of the thyristor, and which may lead to unintentional turning on of the thyristor, again due to current amplification in the partial transistor formed by emitter-, base- and drift-regions of the thyristor, especially at higher temperatures. The emitter shorts 128 are formed by small holes or throughs in the cathode emitter layer 106 through which the p-doped base layer 108 may reach the cathode side surface 102, metalized with the cathode metallization 114 as shown in FIG. 3. The p-doped regions with missing (n+)-doping on the cathode side 102 thus formed are sometimes also referred to cathode emitter shorts or cathode shorts as they may short-circuit the cathode junction. The emitter shorts 128 may form an ohmic short-circuit across a junction between p-doped base and (n+)-doped emitter, and may conduct a significant portion of the current at low current densities, i.e. in all phases where forward blocking is required. Therefore, undesired dV/dt triggering may be avoided in most practical cases. For given—or desired—forward blocking and/or dV/dt withstand capability, a maximum distance dmax can be determined such that—ideally—no emitter short should be further than dmax from its closest neighboring emitter short.
However, emitter shorts also have a various drawbacks. Most prominently, an effective area of the cathode region is reduced, thus increasing an on-state resistance, and as a consequence, an on-state voltage VT. In particular, plasma expansion in a lateral direction, i.e. a direction parallel to the cathode side surface of the thyristor, is slowed down by the emitter shorts. This may lead to localized, high anode currents due to a fast rise of electric current in triggered regions of the thyristor occurring shortly after turn on; which in turn involves a risk of thermal overloading, and ultimately, destruction of the thyristor. As a consequence, a dl/dt capability of the thyristor is reduced. To limit the effects of this drawback, ideally no two emitter shorts should be closer than dmax from one another.
From the two former requirements, it follows that an emitter shorts pattern of a thyristor as described above should be as uniform and homogenous as possible, ideally with a constant density of shorts over the whole cathode region, and all subregions thereof, in particular in cathode regions close to the gate structure.
For thyristors with simple gate region geometries and/or for parts of the cathode region distant from the gate region, this is in general relatively easy to achieve. As indicated in the top view of FIG. 4, the emitter shorts 128 may be provided in the form of small dots arranged in a regular pattern across the whole cathode region. Such a regular pattern may, e.g., be obtained by superposing a pattern of regularly arranged points over the cathode region as well as over a neighborhood adjoining said cathode region, and by subsequently selecting only those points which are located within the cathode region, and preferably having a given minimum distance from a boundary of said cathode region, and by arranging emitter shorts at the points thus selected. The emitter shorts 128 not only influence the axial triggering behavior, but a good shorts design may also yield a high lateral plasma spread velocity and may therefore result in a high permissible current variation dl/dt. It may be of high importance that there is no area of the cathode region where the shorts density gets below a minimum value because such an area may form a weak spot during re-application of forward blocking voltage after turn-off.
In particular, for thyristors having complicated gate region geometry—and thus, in general, a similarly complicated cathode region geometry—as described further above, this is non-trivial. WO 2011/161097 A2 suggests an improved design methodology, which comprises partitioning of the cathode region into a plurality of subregions, in particular covering a neighborhood of the main gate beam or beams and/or one or more bulk regions remote from the main gate beam or beams, respectively; determining prospective short locations to form an—at least substantially—uniform pattern in each subregion; and subsequently forming a global pattern of short locations by adding and/or removing short locations in areas where the subregions overlap or adjoin, such that the above considerations with respect to an optimum distance between individual emitter shorts may be fulfilled as closely as possible when shorts are placed at the locations according to the global pattern. FIG. 5 shows a partial view of a process mask 300 as described in WO 2011/161097 A2, for use during manufacture of a state of the art phase control thyristor. The figure represents a diffusion mask pattern which may be used to define the (n+)-doped emitter regions 106 at the surface of the cathode side 102 of the thyristor 100 when forming the thyristor structure in the semiconductor slab. The white regions indicate areas which may be doped with donors, in particular phosphorous, in order to obtain the (n+)-doped emitter layer 106; whereas the dark regions prevent donor deposition. In particular, emitter shorts 128 will thus be formed at mask short locations 304; and a pilot gate at a pilot gate region 318 in the mask.
While the above methodology allows providing a relatively homogeneous emitter shorts pattern in an exemplary mask region 310 closer to a location of the main gate beams 316, the pattern will be relatively less homogeneous in an exemplary mask region 312 closer to a location of an associated middle line 314 between neighboring main gate beams and in an exemplary region 330 where two or more subregions adjoin. In other words, an optimum global emitter shorts pattern is not achieved. Taking into account that the efficiency of the emitter shorts with respect to quiescence time and dV/dt stability is determined by a weakest point in the shorts pattern, an optimum thyristor performance may thus not be achieved. In addition, tedious manual interaction is generally required in adding and removing short locations.
In addition, the approaches as discussed above generally lead to a relatively nonuniform distribution of emitter shorts near the boundary of the cathode region. In particular, a distance dclosest between any given point on the boundary and the location of the emitter short closest to said point may vary significantly depending on where on the boundary the point is located. In particular, the distance dclosest may vary between zero and approximately 1.5 dmax, and/or between zero and approximately 1.5 davg, where davg is an average distance between the location of a given first emitter short and the location of a second emitter short closest to said first emitter short, over all emitter shorts in the cathode region. As a consequence, a coefficient of variation of the distance dclosest over the inner boundary and/or the outer boundary of the cathode region is generally larger than 0.4, possibly larger than 0.7.
As the distribution of emitter shorts in a neighborhood of the inner boundary, and in particular a uniformity of said distribution, is particularly crucial to plasma expansion in the vertical direction, and thus—as explained above—to the dl/dt capability of the thyristor, said capability will be significantly limited by the methods as described above.
From DE 37 44 308 A1 and FR 2 178 390 A other phase control thyristors are known with homogeneously distributed emitter shorts.
U.S. Pat. No. 4,150,390 A shows a thyristor having an emitter shorts distribution separated into two groups close to the gate electrode and farer away from the gate, resulting in a very inhomogeneous distribution of the emitter shorts.
U.S. Pat. No. 4,760,438 A describes a thyristor with emitter shorts disposed in a triangular pattern.